Test your progress with this VHDL quiz after completing part 4 of the Basic VHDL Tutorial series!
[wpViralQuiz id=15773]
Test your progress with this VHDL quiz after completing part 4 of the Basic VHDL Tutorial series!
[wpViralQuiz id=15773]
I’m from Norway, but I live in Bangkok, Thailand. Before I started VHDLwhiz, I worked as an FPGA engineer in the defense industry. I earned my master’s degree in informatics at the University of Oslo.
VUnit is one of the most popular open-source VHDL verification frameworks available today. It combines a Python test suite runner with a dedicated VHDL library to automate your testbenches.
In this article, I will present a VHDL module that can display a two-digit number on the Pmod SSD: Seven-segment Display from Digilent. The dual 7-segment display is compatible with the Pmod interface, meaning that you can use it without any soldering. It fits into the Pmod connector, which is standard on many FPGA development boards.
This tutorial shows how to install the Lattice iCEcube2 FPGA design software on Ubuntu 20.04. Instead of the Lattice Diamond Programmer, we will use the alternative programmer from Project IceStorm that works flawlessly on Ubuntu Linux. The Lattice iCEcube2 FPGA design software only works on Red Hat-based Linux distributions out of the box. Fortunately, we…
Which HDL is the most popular, and should I learn VHDL or Verilog? That’s a question I often get asked, and it’s understandable. People want to future-proof their learning by betting on the winning horse. But which one is it, and does it matter?
The Case-When statement will cause the program to take one out of multiple different paths, depending on the value of a signal, variable, or expression. It’s a more elegant alternative to an If-Then-Elsif-Else statement with multiple Elsif’s. Other programming languages have similar constructs, using keywords such as a switch, case, or select. Among other things,…
In earlier tutorials we have used the wait for statement to delay time in simulation. But what about production modules? The wait for statement cannot be used for that. That only works in simulation because we can’t just tell the electrons in a circuit to pause for a given time. So how can we keep…
This is the most extensive course VHDLwhiz has ever made.
First of all, thank you so very much!
These are by far the most comprehensible tutorials I have come across like ever!
Brilliant work.
So here my two cents out of gratitude:
Basic VHDL Quiz – part 4
Which statement is not true?
Answer 3 : The return statement cannot be omitted.
-> Correct
So the return statement CAN be omitted???
“Unlike in most other programming languages, the return keyword is mandatory in functions in VHDL.”
Confused by double negation. Me or you 😉
Good catch! I’ve changed the answer now. I was trying to make you think, but in the process I confused myself too 🙂
“The return-keyword cannot be used in a procedure”. I believe that this is incorrect, e.g.
https://web.archive.org/web/20200629023040/http://vhdl.renerta.com:80/source/vhd00060.htm
It is true, of course, that you cannot return a value with it, that’s the only (?) difference between procedures and functions. But, as in other languages, you can use “return” as control flow statement to “force an exit”.
You are right! I missed the possibility of using return statements in procedures without returning a value. According to the Renata link you posted, functions must return a value, while procedures can have return statements, but then without a return value.
I am changing this question.