VHDL sine wave generator using block RAM

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This VHDL module reads pre-calculated values from block RAM in the FPGA to generate a smooth sine wave pattern on the output signal.

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Description

The sine_rom.vhd module uses block RAM as read-only memory (ROM) to store the sample points of a full sine wave. The X and Y-axes precision of the sine wave is configurable through generics.

In addition to the ModelSim testbench, the Zip contains an example implementation for the Lattice iCEstick FPGA board. The demo design uses PWM to pulse an LED on the iCEstick with sine wave intensity, creating a smooth LED breathing effect.

Entity

entity sine_rom is
  generic (
    addr_bits : integer range 1 to 30;
    data_bits : integer range 1 to 31
  );
  port (
    clk : in std_logic;
    addr : in unsigned(addr_bits - 1 downto 0);
    data : out unsigned(data_bits - 1 downto 0)
  );
end sine_rom; 

Main article

Click here to read more about how I created this module:
How to create a breathing LED effect using a sine wave stored in block RAM

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How does it work?

Tested on Windows and Linux Loading Gif.. How it works

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    License agreement

    MIT License

    Copyright (c) 2022 Jonas Julian Jensen

    Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

    The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.

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