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VHDL module: Wishbone crossbar interconnect
This module continues my Wishbone course. It lets multiple Wishbone masters and slaves communicate.
In the 40-minute video on the resource page, I will first show how to use and simulate the demo project. Then, in the second half of the video, I explain how the code works.
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Tools used:
Questa/ModelSim
Intel Quartus
Xilinx Vivado
Lattice iCEcube2
VS Code editor
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Logic gates interactive demo
Basic VHDL quiz
Part 6: Complementary FIR filters
