Course: SPI master for reading ambient light sensor
$59Learn to create an SPI master in VHDL for reading an ambient light sensor from an FPGA. We also make an SPI slave BFM for simulating the ADC chip.
Showing 13–18 of 18 results
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Course: Tools for debugging VHDL designs
FPGA projects are challenging to debug, and that’s because it’s hard to understand what’s going on in the design. But once we gain insight and see the complete picture, problems often melt away.
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Course: Clock divider
Learn to use Xilinx’s MMCMs to derive clocks, create a gated clock, and write a run-time configurable clock divider without sacrificing timing using the BUFGCE primitive.
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Course: FPGA and VHDL Fast-Track
$27Hands-On for Absolute Beginners. Understand the basics of FPGA development using VHDL in a few evenings!
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VHDL module: AXI-style UART
$15This project contains three general-purpose, AXI compatible, universal asynchronous receiver-transmitter (UART) modules.
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VHDL dual 7-segment display controller
$0This VHDL module shows a decimal value from 0 to 99 on the Pmod SSD: Seven-segment Display from Digilent or similar dual 7-segment display.
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