I’m from Norway, but I live in Bangkok, Thailand. Before I started VHDLwhiz, I worked as an FPGA engineer in the defense industry. I earned my master’s degree in informatics at the University of Oslo.
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How to stop simulation in a VHDL testbench
How do you stop the VHDL simulator when the simulation is complete? There are several ways to do that. In this article, we will examine the most common ways to end a successful testbench run. The VHDL code presented here is universal, and it should work in any capable VHDL simulator. For the methods involving…
![How to generate random numbers in VHDL](https://vhdlwhiz.com/wp-content/uploads/2019/12/random_gen-768x432.png)
How to generate random numbers in VHDL
VHDL has a built-in pseudo-random generator, but it can only generate floating-point numbers between 0 and 1. Fortunately, you can derive from this any other kind of random data format you should need. Continue reading this article to find out how to produce real or integer values of any range, as well as random std_logic_vector…
![How to link Quartus Prime IP libraries to VUnit](https://vhdlwhiz.com/wp-content/uploads/2021/07/vunit-quartus-featured.png)
How to link Quartus Prime IP libraries to VUnit
Have you ever wanted to run a VHDL simulation that includes a Quartus IP core through the VUnit verification framework?
This tutorial shows you how to generate, incorporate, and link external Quartus IP libraries to VUnit.
![How to use a procedure in VHDL](https://vhdlwhiz.com/wp-content/uploads/2017/12/procedures.png)
How to use a procedure in VHDL
A procedure is a type of subprogram in VHDL which can help us avoid repeating code. Sometimes the need arises to perform identical operations several places throughout the design. While creating a module might be overkill for minor operations, a procedure is often what you want. Procedures can be declared within any declarative region. The…
![How to use Loop and Exit in VHDL](https://vhdlwhiz.com/wp-content/uploads/2017/07/loop_and_exit.png)
How to use Loop and Exit in VHDL
In the previous tutorial we learned how to delay time using the wait for statement. We also learned about the process loop. We now know that if we let it, the process “thread” will loop within the process forever. But what if we want to do something just once at the beginning of the process?…
![Basic VHDL quiz – Part 4](https://vhdlwhiz.com/wp-content/uploads/2018/10/quiz-part-4.jpg)
Basic VHDL quiz – Part 4
Test your progress with this VHDL quiz after completing part 4 of the Basic VHDL Tutorial series!