The STD library is the foundational VHDL library, defined in
§§16.3, 16.4, 16.5, and 16.12 of IEEE Std 1076-2019 as
part of the language standard itself. It contains the predefined
types every design unit relies on (STD.STANDARD),
text file I/O routines (STD.TEXTIO), simulator and
environment access (STD.ENV), and the runtime
introspection facilities added in VHDL 2019
(STD.REFLECTION).
Every design unit gets an implicit
library std; use std.standard.all; clause, so the
predefined types (BIT, INTEGER,
REAL, BOOLEAN, STRING,
BIT_VECTOR, ...) are visible without ceremony. The
other three packages require an explicit use clause.
